1. Field of the Invention
The present invention relates to a drive circuit configured with a thin-film transistor, an active matrix substrate and a liquid crystal display device using the same, and a method of reducing off-leak current of a thin film transistor. Hereinafter, a thin film transistor is referred to as a TFT.
2. Related Art
In an active matrix display device, a TFT is formed on a transparent substrate such as glass or quartz, and the TFT is used as a switch of a pixel. A TFT used as a switch of a pixel has to hold the voltage until the next writing when being turned off after a predetermined voltage has been written to a pixel electrode. However, if off-leak current of the TFT is larger, the written voltage is lowered via the TFT, causing a drop in contrast and the like.
Recently, a technique of forming not only pixel transistors but also some drive circuits on a glass substrate has been developed. In this technique, an n-channel type or p-channel type TFT is adopted as a pixel transistor, and a CMOS (Complementary Metal Oxide Semiconductor) circuit is often used as a drive circuit. Although a pixel transistor is required to have low off-leak current characteristics in order to hold the voltage as described above, a CMOS circuit configuring a drive circuit is not generally required to have low off-leak current characteristics as a pixel transistor.
In the case of using a CMOS circuit as a drive circuit, in order to reduce off-leak current of a pixel transistor, a technique of reducing impurity included in a source region or a drain region has been known (see Japanese Patent Laid-Open Publications No. 2005-223347 and No. 2003-115498, for example). When forming a pixel transistor and a CMOS drive circuit on the same substrate, a number of processes are required because n-channel type and p-channel type TFTs are formed. As such, in order to reduce the processes, a technique of forming a drive circuit using a TFT of the same conductivity type as that of a pixel transistor has been developed (see Japanese Patent Laid-Open Publication No. 2006-351165, for example).
In order to realize a drive circuit only with a TFT of a single conductivity type, a technique called bootstrap is often used. In this technique, it has been known that when off-leak current of a drive circuit is large, an intended drive voltage cannot be output, as described later. As such, in a drive circuit only including a single conductivity type TFT, the off-leak current thereof is required to be sufficiently reduced. For example, in the case of forming a drive circuit with a CMOS, when off-leak current of the TFT is 1*10−6 A or lower, erroneous operation can be generally prevented. Meanwhile, in the bootstrap technique for realizing a drive circuit only with a single conductivity type TFT, an intended normal voltage cannot be output unless the off-leak current of the TFT is 1*10−8 A or lower. Otherwise, a risk causing erroneous operation increases. As such, in the case of forming all pixel transistors and drive circuits with TFTs of a single conductivity type, it is indispensable to reduce off-leak current of not only the TFT of the pixel transistor but also the TFT of the drive circuit.
A TFT of a single drain structure has involved a problem of off-leak current being large. Off-leak current is caused by a tunneling phenomenon which occurs from the valence band to the conduction band of silicon because the drain end electric field becomes particularly large when the transistor is in an off state. Further, as a tunneling phenomenon through the in-gap level, which is unique to polycrystalline silicon, induces this problem, there is a problem that off-leak current is particularly large in a polysilicon TFT formed on a glass substrate. In order to address this problem, off-leak current is generally reduced by suppressing the electric field at the drain end by providing an LDD (Lightly Doped Drain) region at the end of the drain region, that is, between a channel region and the drain region.
However, a manufacturing method for realizing an LDD structure includes the steps of: forming a base film on a glass substrate, depositing a silicon film thereon; polycrystallizing the silicon film by heat treatment such as laser anneal, depositing a gate insulating film thereon, doping impurity for forming a source region and a drain region using a photoresist as a mask, forming a gate electrode, forming an LDD region by doping low-concentration impurity having the same polarity as that of the source region and the drain region using the gate electrode as a mask, forming an inter-layer insulating film, applying heat treatment for activating the impurity in the source region, the drain region, and the LDD region, exposing them in hydrogenated plasma so as to hydrogenate them; and forming a contact hall in the inter-layer insulating film and the gate insulating film above the source region, the drain region and the gate electrode and connecting a wire metal. As such, in order to realize an LDD structure, it is necessary to perform activation at least after forming the gate line, and the temperature of activation has to be lower than the melting point of the gate material.
As another technique for reducing off-leak current, there has been known a technique in which gates are simply aligned in series as a structure of double gates or triple gates, and impurity is doped between respective gates. This structure is equivalent to one in which a plurality of transistors are aligned in series, directed to distribute a drain voltage applied to one transistor into a plurality of transistors so as to reduce off-leak current. In this technique, however, although distribution of a drain voltage works so that a voltage resistance property can be improved in an on state, as a greater voltage is distributed to a transistor on the drain side in an off state, it is not significantly effective in reducing leak current.
As described above, as off-leak current is large in a single drain structure, an LDD structure is often adopted in order to suppress off-leak current. In that case, the following two problems are involved. One problem is that the number of steps simply increases because an LDD step is included.
A second problem is that as an LDD structure is formed after formation of a gate by doping impurity using a gate electrode as a mask, heat treatment for activation and hydrogenation are required after the formation of the gate electrode. Consequently, by performing activation (heat treatment) and hydrogenation after the formation of the gate, reformation becomes insufficient in the portion under the gate, i.e., the channel region. This is because non-uniform stress caused by heat stress and the like is applied to the portion under the gate, and diffusion of hydrogen radical is blocked by the gate electrode.
On the other hand, in a single drain structure which does not include an LDD structure, as it is only necessary to perform activation (heat treatment) of a source region and a drain region, activation and hydrogenation can be performed before formation of a gate electrode.
Further, in the structure of forming a drive circuit only with a TFT of the same conductivity type as that of a pixel transistor in order to reduce the manufacturing costs by reducing the steps, it is necessary to reduce off-leak current with respect to both TFTs for the pixel transistor and the drive circuit, and preferably, to all TFTs if possible. In a CMOS drive circuit, it is sufficient to reduce off-leak current regarding at least a pixel transistor.